In Situ LPDDR4 Interposer Created on HDI PCB for Debugging & Testability

Event Time

Originally Aired - Tuesday, August 17 8:00 AM - 8:40 AM

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Event Location

Location: Meeting Room 211CD

Event Information

Title: In Situ LPDDR4 Interposer Created on HDI PCB for Debugging & Testability

Event Type: DesignCon - Technical Session

Pass Type: All-Access Pass, 2-Day Pass

Theme: Internet of Things (IoT)


CPU/SoC development often requires both validation systems to ensure functionality of the product as well as reference designs to showcase to customers what can be achieved.  Validation systems are usually large and unwieldly, not providing a proper showcase for a true customer form factor.  Reference boards look more like customer solutions, but the highly integrated nature of these boards means that they often lack the hooks necessary for proper electrical debug and correlation study.  Rather than create further board spins to address validation concerns for memory, a custom LPDDR4 interposer was built using standard HDI PCB manufacturing processes/materials to address this validation gap.

This paper discusses the development of an interposer that fits between the PCB and the LPDDR4 memory devices and provides a slew of signals that can be easily probed using commercial solder-in probe heads.  A family of interposers was eventually developed, each one breaking out different combinations of signals.  LPDDR failure modes are discussed as justification for why an interposer was necessary, electrical and mechanical design requirements of the interposer are presented, and finally the actual performance of the interposer is characterized via measurement-simulation correlation studies and de-embedding strategy.