In this paper, we will examine the impact of emerging ultra-thin film PCB laminates technology for PDN decoupling on PDN architecture and noise reduction strategies. Several PDN architectures will be demonstrated and corresponding package and PCB architecture requirements will be discussed. Then we will explore the required conditions for efficiently applying PCB ultra-thin film decoupling solution and the impact on PCB and package architecture will be examined along with additional considerations such as manufacturability cost and reliability.
We will in-depth examine ultra-thin film-based PCB and package level PDN design considerations such as stackup constraints, number of power pins, vertical connectivity considerations, power plane form factor impact, layer assignment, power to ground pin ration, and die-level decupling requirements. A case study will be presented based on PDN performance measured and simulation data of two identical systems with and without ultra-thin film laminate layers technology, demonstrating the impact of substituting several layers of baseline PCB with thin-film high Dk laminate. We will analyze the measured vs simulation performance of the two systems along with the corresponding cross-sections of the two manufactured PCBs.