Considerations for Reference Equalizer Optimization at 112Gbps

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Originally Aired - Wednesday, August 18 9:00 AM - 9:40 AM

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Event Location

Location: Meeting Room 212AB


Event Information

Title: Considerations for Reference Equalizer Optimization at 112Gbps

Event Type: DesignCon - Technical Session

Pass Type: All-Access Pass, 2-Day Pass

Theme: Autonomous


Description

The application of compound equalizer structures in various emerging DataCom standards presents a new set of requirements with regards to how reference receiver tap settings are configured. This paper will review advances in "tuning" multi-gain-stage linear equalizers and decision feedback equalizers operating serially. The goal of the standards methodology modeled around MMSE or Mueller-Muller techniques is not to "over-tune" the equalizer structures but to define a balanced methodology which can be implemented uniformly by test equipment vendors. It reduces the sensitivity to measurement equipment and test conditions and leaves the receiver designer some margin to further improve on. Similar widely supported approach can be found with dual-dirac method of jitter decomposition where tradeoff between various jitter components is left for the designer.  Additionally, the process of tuning two separate equalizer structures can lead to error propagation stability problems if to much weight is placed on one equalizer.  Several methods will be reviewed in the context of equalization performed for IEEE 802.3ck C2M 100Gbps specifications.


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