USB4 is the most complex USB specification so far and requires designers to understand the USB4, USB 3.2, USB 2.0, USB Type-C, as well as the USB Power Delivery specifications. Designers must also understand PCIe and DisplayPort specifications, as well as High Definition Content Protection (HDCP) for many USB4 designs. This is needed to design USB4 products that meet user expectations: "It's USB - it just works!"
In this session, Synopsys and Keysight will share the details about USB4 PHY IP and the characterization of USB4 PHY IP. These critical elements provide the foundation required for system integrators to design compliant USB4 products that meet strict interoperability requirements in the vast Type-C ecosystem. This requires the Type-C port and PHY operating in USB4 mode, Thunderbolt mode, legacy USB mode, DisplayPort Alternate Mode, and simultaneous USB & DisplayPort mode.
Transmitting 20Gbps simultaneously on all 4 lanes of the Type-C connector, USB4 is challenging to implement. The USB4 channel Insertion Loss budget leave little margin for errors. SoC package, PCB routing, crosstalk and aggressor influence must be carefully controlled. Specialized Transmitter, Receiver, and Return Loss measurement methods are required to validate Signal Integrity and low BER link. We will review details about new Transmitter and Receiver Equalization requirements, testing Retimers and Redrivers, unique test fixture requirements, and new jitter decomposition methods like Uncorrelated Jitter.